Title :
A CMOS Unity Gain Buffer and its Implementation in Sampled-Analog Delay Lines
Author :
Lagos, A.E. ; Chan, Chi Hou
Author_Institution :
Dept. of Electron., Carleton Univ., Ottawa, ON, Canada
Abstract :
The operation of a CMOS unity gain buffer and its implementation in short analog delay lines are discussed, A functional second-order circuit has been successfully realized using an integrated three-stage delay line.
Keywords :
CMOS analogue integrated circuits; buffer circuits; delay lines; CMOS unity gain buffer; functional second-order circuit; integrated three-stage delay line; sampled-analog delay lines; short analog delay lines; Band pass filters; Circuits; Clocks; Delay lines; Energy consumption; Low voltage; Mirrors; Operational amplifiers; Output feedback; Switches;
Conference_Titel :
Solid State Circuits Conferene, 1980. ESSCIRC 80. 6th European
Conference_Location :
Grenoble
DOI :
10.1109/ESSCIRC.1980.5468784
