Title :
Exploring multiple levels of parallelism using BOPS´ DSP
Author :
Latif, Wasif ; Shahid, Aniq ; Saud, Faisal ; Ali, Saqib ; Khan, Shoab Ahmed
Author_Institution :
Dept. of Electr. Eng., Univ. of Eng. & Technol., Taxila, Pakistan
Abstract :
A study of high performance, reusable and scalable DSP architecture of BOPS, which targets specific applications, is carried out. The degree of parallelism supported by the BOPS´ ManArray architecture and its usability is tested on various algorithmic building blocks along with the more complex and irregular algorithm of the G.729a vocoder, a key requirement of VoIP gateway DSP engine. An analysis to reduce complexity as well as implementation of G.729a on an array processor using various optimization techniques is presented.
Keywords :
circuit complexity; circuit optimisation; digital signal processing chips; parallel architectures; vocoders; BOPS; DSP; DSP architecture; G.729a; ManArray architecture; VoIP gateway DSP engine; algorithmic building blocks; array processor; complexity; multiple parallelism levels; optimization techniques; reusable scalable architecture; usability; Computer architecture; Digital signal processing; Engines; Finite impulse response filter; Parallel processing; Registers; Signal processing algorithms; Usability; VLIW; Vocoders;
Conference_Titel :
Multi Topic Conference, 2001. IEEE INMIC 2001. Technology for the 21st Century. Proceedings. IEEE International
Print_ISBN :
0-7803-7406-1
DOI :
10.1109/INMIC.2001.995334
