Title :
Memory reliability model for accumulated and clustered soft errors
Author :
Lee, Soonyoung ; Baeg, Sanghyeon ; Reviriego, Pedro
Author_Institution :
Hanyang Univ., Ansan, South Korea
Abstract :
The soft error rate of memories is increased by high-energy particles as technology shrinks. Single-error correction codes (SEC), scrubbing techniques and interleaving schemes are the most common approaches for protecting memories from soft errors. It is essential to employ analytical models to guide the selection of interleaving distance; relying on rough estimates may lead to unreasonable design choices. The analytic model proposed in this paper includes row clustering effects of accumulated upsets and was able to estimate the failure probability with only a difference of 0.41% compared to the test data for a 45 nm SRAM design.
Keywords :
SRAM chips; error correction codes; integrated circuit reliability; logic design; radiation hardening (electronics); SRAM design; accumulated soft error; accumulated upsets; clustered soft error; interleaving schemes; memory reliability model; row clustering effects; scrubbing techniques; single error correction codes; size 45 nm; Computer architecture; Data models; Life estimation; Mathematical model; Microprocessors; Random access memory; Reliability;
Conference_Titel :
Integrated Reliability Workshop Final Report (IRW), 2010 IEEE International
Conference_Location :
Stanford Sierra, CA
Print_ISBN :
978-1-4244-8521-5
DOI :
10.1109/IIRW.2010.5706501
