DocumentCode :
2412242
Title :
The power grid transient simulation in linear time based on 3D alternating-direction-implicit method
Author :
Lee, Yu-Min ; Chen, Charlie Chung-Ping
Author_Institution :
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
fYear :
2003
fDate :
2003
Firstpage :
1020
Lastpage :
1025
Abstract :
The rising power consumption and clock frequency of VLSI technology demand robust and stable power delivery. Extensive transient simulations on large scale power delivery structures are required to analyze power delivery fluctuation caused by dynamic IR-, and Ldi/dt drop as well as package and on-chip resonance. This paper develops a novel and efficient transient simulation algorithm for the power distribution networks. The 3D TLM-ADI (Transmission-Line-Modeling Alternating-Direction-Implicit) method, first models the power delivery structure as a three dimensional transmission line shunt node structure and transfers those equations to the Telegraph equation. Finally, we solve it by the alternating direction implicit method. The 3D TLM-ADI method, with linear runtime and memory requirement, is also unconditionally stable which ensures that the time-steps are not limited by any stability requirement. Numerical experimental results show that the 3D TLM-ADI method is not only over 300,000 times faster than SPICE but also extremely memory saving and accurate.
Keywords :
VLSI; circuit simulation; monolithic integrated circuits; numerical stability; power supply circuits; transient analysis; transmission line theory; 3D TLM-ADI method; 3D alternating-direction-implicit method; 3D transmission line shunt node structure; Ldi/dt drop; Telegraph equation; VLSI technology; chip power distribution networks; dynamic IR drop; large scale power delivery structures; linear runtime; power delivery fluctuation; power grid transient simulation; transmission-line modeling; Analytical models; Clocks; Energy consumption; Equations; Frequency; Power grids; Power system transients; Robustness; Transient analysis; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2003
ISSN :
1530-1591
Print_ISBN :
0-7695-1870-2
Type :
conf
DOI :
10.1109/DATE.2003.1253738
Filename :
1253738
Link To Document :
بازگشت