DocumentCode
2413638
Title
Fermi-level depinning in metal/Ge Schottky junction and its application to metal source/drain Ge NMOSFET
Author
Kobayashi, Masaharu ; Kinoshita, Atsuhiro ; Saraswat, Krishna ; Wong, H. S Philip ; Nishi, Yoshio
Author_Institution
Dept. of Electr. Eng., Stanford Univ., Stanford, CA
fYear
2008
fDate
17-19 June 2008
Firstpage
54
Lastpage
55
Abstract
We successfully demonstrated Schottky barrier height modulation in metal/Ge Schottky junction by inserting an ultrathin interfacial SiN layer. The SiN layer suppressed strong Fermi level pinning in metal/Ge junction, which resulted in effective control of the Schottky barrier height. We systematically investigated its physics, for the first time, and almost zero Schottky barrier height was successfully obtained for electrons. We applied this technology to metal source/drain Ge NMOSFET and achieved low source/drain resistance.
Keywords
Fermi level; MOSFET; Schottky gate field effect transistors; germanium; Fermi-level depinning; Ge; Schottky barrier height modulation; Schottky junction; metal source-drain NMOSFET; source-drain resistance; Contact resistance; Electrons; Erbium; Insulation; MOSFET circuits; Schottky barriers; Schottky diodes; Silicon compounds; Surface resistance; Thermionic emission;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2008 Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4244-1802-2
Electronic_ISBN
978-1-4244-1803-9
Type
conf
DOI
10.1109/VLSIT.2008.4588561
Filename
4588561
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