DocumentCode
2415583
Title
Clusterable Cellular Visual Microprocessor
Author
Földesy, Péter ; Zarándy, Ákos ; Rekeczky, Csaba ; Roska, Tamás ; Kozák, László
Author_Institution
Cellular Sensory & Wave Comput. Res. Lab., Comput. & Autom. Res. Inst. of the HAS, Budapest
fYear
2008
fDate
14-16 July 2008
Firstpage
113
Lastpage
115
Abstract
The performance of a cellular visual microprocessor ASIC and FPGA implementation is described. The architecture in general is composed of a regular sensor readout circuit array, prepared for 3D face-to-face type sensor integration, and one (or several cascaded) array(s) of customizable processors. The individual arrays derived from the same general RTL description and could be of different dimension, aspect ratio, and computing resources.
Keywords
application specific integrated circuits; field programmable gate arrays; microprocessor chips; 3D face-to-face type sensor integration; ASIC; FPGA; clusterable cellular visual microprocessor; readout circuit array; Application specific integrated circuits; Automation; Cellular networks; Cellular neural networks; Computer architecture; Computer networks; Information technology; Laboratories; Microprocessors; Sensor arrays;
fLanguage
English
Publisher
ieee
Conference_Titel
Cellular Neural Networks and Their Applications, 2008. CNNA 2008. 11th International Workshop on
Conference_Location
Santiago de Compostela
Print_ISBN
978-1-4244-2089-6
Electronic_ISBN
978-1-4244-2090-2
Type
conf
DOI
10.1109/CNNA.2008.4588660
Filename
4588660
Link To Document