DocumentCode
2416166
Title
Reverse Tracer: a software tool for generating realistic performance test programs
Author
Sakamoto, Mariko ; Brisson, Larry ; Katsuno, Akira ; Inoue, Aiichiro ; Kimura, Yasunori
Author_Institution
Fujitsu Labs. Ltd., Tokyo, Japan
fYear
2002
fDate
2-6 Feb. 2002
Firstpage
81
Lastpage
91
Abstract
During the development of high-performance processors, software performance models are used to obtain performance estimates. These models are not cycle-accurate, so their results can have significant errors, leading to performance surprises after the hardware is built. Some performance tests can run directly on the logic simulators, to get more accurate results, but those simulators cannot run large interactive workloads with I/O and much operating system code. So the accurate performance estimates from logic simulators are only available for application code, and are not adequate for the evaluation of powerful server systems that are primarily intended to run large interactive workloads. We discuss a software tool system, the "Reverse Tracer", that generates executable performance tests from an instruction trace of the workload. The generated performance tests retain the essential performance characteristics of multi-user I/O-intensive workloads without doing any real I/O, so they can run in logic simulation to measure performance accurately before the hardware is built.
Keywords
application generators; automatic test software; input-output programs; logic simulation; performance evaluation; software tools; virtual machines; Reverse Tracer; accurate performance measurement; application code; errors; executable performance tests; high-performance processors; instruction trace; large interactive workloads; logic simulators; multi-user I/O-intensive workloads; noncycle-accurate models; operating system code; performance estimates; realistic-performance test program generation; server systems; software performance models; software tool; Computer architecture; Software testing; Software tools;
fLanguage
English
Publisher
ieee
Conference_Titel
High-Performance Computer Architecture, 2002. Proceedings. Eighth International Symposium on
ISSN
1530-0897
Print_ISBN
0-7695-1525-8
Type
conf
DOI
10.1109/HPCA.2002.995700
Filename
995700
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