DocumentCode :
2417022
Title :
60 GHz LNAs in 90 nm CMOS technology
Author :
Malignaggi, Andrea ; Hamidian, Amin ; Shu, Ran ; Kamal, Ali M. ; Kravets, Alexander ; Boeck, Georg
Author_Institution :
Microwave Eng. Lab., Berlin Inst. of Technol., Berlin, Germany
fYear :
2012
fDate :
3-5 Oct. 2012
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents two fully integrated 60 GHz single stage low noise amplifiers for wireless applications using the cascode topology. The two different amplifiers have been optimized for different purposes, one for low noise and the other for high gain. They are implemented in a 90 nm low power CMOS technology. The matching networks have been realized using shielded coplanar transmission lines. The low noise stage achieves 5.6 dB small signal gain and 7.5 dB noise figure, while the gain stage reaches 7.1 dB small signal gain and 8.5 dB noise figure. Both the stages consume approximately 7 mW. The detailed design procedure and the achieved measurement results are presented in this work.
Keywords :
CMOS integrated circuits; cascade networks; coplanar transmission lines; low noise amplifiers; low-power electronics; network topology; LNA; cascode topology; frequency 60 GHz; gain 5.6 dB; gain 7.1 dB; low noise amplifiers; low power CMOS technology; noise figure 7.5 dB; noise figure 8.5 dB; power 7 mW; shielded coplanar transmission lines; size 90 nm; wireless applications; CMOS integrated circuits; CMOS technology; Gain; Gain measurement; Noise; Noise figure; 60 GHz; 90 nm CMOS technology; Cascode; High data rate wireless applications;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems, and Electronics (ISSSE), 2012 International Symposium on
Conference_Location :
Potsdam
ISSN :
2161-0819
Print_ISBN :
978-1-4673-4454-8
Electronic_ISBN :
2161-0819
Type :
conf
DOI :
10.1109/ISSSE.2012.6374288
Filename :
6374288
Link To Document :
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