Performance investigation of p-type Ge- and Ge-Core/Si-Shell junctionless nanowire transistors

We proposed Ge-Core/Si-Shell junctionless nanowire (C/S-JLNWT) device. The performance of p-channel C/S-JLNWT junctionless nanowire transistors is simulated. The working mechanism and the important impact factors on the devices´ performance are studied. The results suggest that current mainly flows in Ge core part in C/S-JLNWT. Thinner nanowires enhance the drivability of C/S-JLNWT devices, but diminish that of Ge channel junctionless nanowire (Ge-JLNWT) device. Larger Ge core radius can increase on-state current but change SS slightly. Higher doping concentration will raise I_on and SS simultaneously. With the scaled down of gate length, the C/S-JLNWTs show better short channel properties.