Title :
A fast compressive sensing reconstruction hardware based on modified subspace pursuit
Author :
Yicheng Zhang ; Hui Chen ; Jun Han ; Xiaoyang Zeng
Author_Institution :
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
Abstract :
Compressive sensing theory is an attractive way in signal processing due to its capability of sampling signals at sub-Nyquist rate. In this paper, a modified subspace pursuit algorithm is proposed to reconstruct compressed signals. The proposed algorithm reduces the complexity by omitting one of the least square operations. A high speed hardware is implemented in SMIC 65nm CMOS. The ACD algorithm is used when solving least square problem. Systolic array architecture is used and multipliers are reused to the most extent to reduce area. The accelerator utilizes a measure vector with 64 elements to reconstruct a digital signal with length 256 and sparsity 8. The synthesized design area is 3.33 mm2 and reconstruction time is 7.42us.
Keywords :
CMOS integrated circuits; CMOS logic circuits; compressed sensing; least squares approximations; signal reconstruction; signal sampling; systolic arrays; ACD algorithm; SMIC; compressive sensing theory; fast compressive sensing reconstruction hardware; least square operation; modified subspace pursuit; signal processing; signal sampling; size 65 nm; subNyquist rate; systolic array architecture; Abstracts; Complexity theory; Digital TV; Hardware; Logic arrays; Q measurement; Refining;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
DOI :
10.1109/ICSICT.2014.7021457