A model for single poly EEPROM cells

A model for the single poly EEPROM cells is proposed in this paper, which gives an expression of the floating gate potential. Combining this model and the gate current data of the tunneling transistor, we find a method to implement the transient simulation of the memory cell, including program and erase operations. In the end, an extension of the proposed model is provided to enhance the model´s universality. The simulation results using the proposed model have much better consistency with the TCAD simulated results than those using the traditional old model. The proposed model will be very useful for us to design, evaluate and optimize a single poly EEPROM cell.