A novel speech recognition system-on-chip

Author

Yang, Haijie ; Yao, Jing ; Liu, Jia

Author_Institution

Dept. of Electron. Eng., Tsinghua Univ., Beijing

fYear

2008

fDate

7-9 July 2008

Firstpage

764

Lastpage

768

Abstract

This paper introduces a novel isolated word speech recognition system-on-chip (SoC). An Application Specific Integrated Circuit (ASIC) with a unique vector accelerator is designed in the SoC to realize Continuous density Hidden Markov Model (CHMM) recognition algorithm based on the Mel-Frequency Cepstral Coefficients (MFCC) feature. Due to a hardware and software co-design, the cost of the ASIC is similar to a low-cost 8bit micro controller unit (MCU). A two-stage strategy is adopted for recognizing 200-phrase and recognition accuracy rate is about 98%.

Keywords

application specific integrated circuits; hidden Markov models; speech recognition; system-on-chip; ASIC; application specific integrated circuit; continuous density hidden Markov model; mel-frequency cepstral coefficients feature; speech recognition; system-on-chip; unique vector accelerator; Algorithm design and analysis; Application specific integrated circuits; Consumer electronics; Costs; Hardware; Hidden Markov models; Isolation technology; Signal processing algorithms; Speech recognition; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Audio, Language and Image Processing, 2008. ICALIP 2008. International Conference on

Conference_Location

Shanghai

Print_ISBN

978-1-4244-1723-0

Electronic_ISBN

978-1-4244-1724-7

Type

conf

DOI

10.1109/ICALIP.2008.4590020

Filename

4590020