DocumentCode
2425361
Title
Schemes for reducing communication latency in regular computations on DSM multiprocessors
Author
Takesue, Masaru
Author_Institution
Dept. of Electron. & Inf. Eng., Hosei Univ., Koganei, Japan
fYear
1998
fDate
10-14 Aug 1998
Firstpage
164
Lastpage
171
Abstract
This paper proposes two schemes for reducing the communication latency in the computations with local and regular communication patterns. The primary scheme is the local protocol for enhancing spatial locality of the coherence actions, and the second is for the communication via stream data. The local protocol is a subsidiary of a traditional coherence protocol and activated on a memory block basis. If activated on a memory block, the domain of coherence actions is confined into the caches that are currently sharing that block. Otherwise, the domain involves the memory as well as those caches. It is easy to efficiently communicate via stream data in the local coherence domain. Our experimental results show that one of the three proposed local protocols, the tampering protocol, significantly improves the performance as compared with the conventional protocol. The communication via stream data contributes to a further performance improvement
Keywords
cache storage; distributed memory systems; memory protocols; performance evaluation; shared memory systems; DSM multiprocessors; cache; coherence protocol; communication latency reduction; distributed shared memory systems; local protocol; memory block; performance; regular computations; spatial locality; stream data; tampering protocol; Delay;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing, 1998. Proceedings. 1998 International Conference on
Conference_Location
Minneapolis, MN
ISSN
0190-3918
Print_ISBN
0-8186-8650-2
Type
conf
DOI
10.1109/ICPP.1998.708478
Filename
708478
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