Special session 6C: New topic mixed-signal test impact to SoC commercialization

With the growing presence of analog and mixed-signal blocks in SoC designs, test and validation cost and quality of mixed-signal circuits is taking the spotlight within the semiconductor industry. This is compounded by the fact that recent innovations in digital test have dramatically reduced the cost of testing digital blocks while analog and mixed-signal blocks are still being tested using brute force methods resulting in a growing contribution of analog test cost to the overall SoC test cost. As a result test cost of mixed-signal blocks in an SoC is becoming an inhibiting factor in commercializing cost effective mixed-signal SoCs. The issue is most pronounced in SoCs with power management and RF components. The normalized cost of test per mm² of mixed-signal blocks is at least 10 higher than digital blocks. It is therefore imperative for the industry to rapidly advance analog test and characterization to the same level of efficiency as digital in order to effectively manage the test cost and quality of mixed signal SoCs. One of the primary problems is that two of the fundamental building blocks of a test strategy are missing: there is nothing equivalent to automatic test-pattern generation for analog, and that is mainly because there is no practical fault model for analog circuits and DFT and BIST are being used for analog circuits but they are custom efforts for each circuit. The lack of a practical fault model is making it impossible to truncate test effert while guranteeing test quality before silicon production is fully ramped. In this paper, we will discuss major contributing factors to this trend and examine potential solutions to address the issue. Karim Arabi´s bio: Karim Arabi is Sr. Director, Engineering at Qualcomm where he is responsible for leading DFT and EDA across the company. He held key technical management positions at PMC Sierra and Cirrus Logic. Karim was a founder of Opmaxx, Inc., an innovative startup in analog design and test a- - utomation, acquired by Credence. Karim´s main research interest includes DFT, BIST, low power design, design methodology development and design automation. Karim received his Ph.D. and M.Sc. degrees in Electrical Engineering from Ecole Polytechnique of Montreal and his B.Sc. degree in Elctronics from Tehran Polytechnic.