Low-power discrete-time CMOS chaotic oscillator based on approximated non-linear characteristic

This paper presents a low-power discrete-time chaotic oscillator based on approximately non-linear characteristic. The oscillator circuit consists of an inverter and subtractor operational amplifier (Op-Amp) in order to controlled transfer characteristics by gain of Op-Amp. The circuit has been using as a chaos map that generates discrete-time chaotic signal. Simulations of proposed circuit are described and examined in terms of Lyapunov exponent and one-dimensional bifurcation diagram to exhibit that it has a desirable chaotic characteristics. The designed circuit has been verified by simulations in a 0.18μm CMOS process to offers low power consumption.