Title :
On the complexity of the Port Assignment Problem for Binary Commutative Operators in high-level synthesis
Author :
Brisk, Philip ; Ienne, Paolo
Author_Institution :
Sch. of Comput. & Commun. Sci., Ecole Polytech. Fed. de Lausanne (EPFL), Lausanne, Switzerland
Abstract :
The present formulation of the port assignment problem for binary commutative operators tries to minimize the number of wires connected to both the left and right inputs of the operator; intuitively, this minimizes the total number of inputs connected to both inputs, which reduces the size of the multiplexers that are instantiated. This paper revises the formulation to attempt to balance the difference between the number of wires connected to both inputs; minimizing the size of the larger multiplexer place on the input minimizes the delay through the operator.
Keywords :
multiplexing equipment; binary commutative operators; high-level synthesis; multiplexers; port assignment problem complexity; Aggregates; Delay; High level synthesis; Libraries; Merging; Multiplexing; Wires;
Conference_Titel :
VLSI Design, Automation and Test, 2009. VLSI-DAT '09. International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-2781-9
Electronic_ISBN :
978-1-4244-2782-6
DOI :
10.1109/VDAT.2009.5158164