DocumentCode
2436616
Title
An ultra-fine processor for FPGA DSP chip multiprocessors
Author
Milford, Matt ; McAllister, John
Author_Institution
Sch. of Electr. Eng., Electron. & Comput. Sci., Queen´´s Univ., Belfast, UK
fYear
2009
fDate
1-4 Nov. 2009
Firstpage
226
Lastpage
230
Abstract
State-of-the-art FPGA host programmable datapaths which enable trillions of mathematical computations per second. However current FPGA design technology cannot harness these resources in an effective manner. This paper introduces the FPGA Streaming Element (fSE) processor, an ultra-high performance, low cost programmable processor designed to exploit these resources. This enables the performance of dedicated hardware solutions with reduced implementation effort, due to the reduction in effort made possible by working a higher level of abstraction. The performance and resource utilisation of the fSE is benchmarked for a 16 point FFT and compared with a dedicated hardware solution, proving that these processors can achieve performance and cost in excess of dedicated hardware solutions, whilst enabling a simpler software based design solution.
Keywords
digital signal processing chips; field programmable gate arrays; multiprocessing systems; FPGA DSP chip multiprocessors; FPGA host programmable datapaths; FPGA streaming element processor; hardware solutions; ultrafine processor; Costs; Data processing; Digital signal processing; Digital signal processing chips; Fabrics; Field programmable gate arrays; Hardware; Process design; Random access memory; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Computers, 2009 Conference Record of the Forty-Third Asilomar Conference on
Conference_Location
Pacific Grove, CA
ISSN
1058-6393
Print_ISBN
978-1-4244-5825-7
Type
conf
DOI
10.1109/ACSSC.2009.5470118
Filename
5470118
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