Title :
Proceedings. International Test Conference 2004 (IEEE Cat. No.04CH37586)
Abstract :
The following topics are dealt with: microprocessor testing; logic BIST; BIST for jitter; memory testing; failure characterization methods for IC diagnosis; board and system test; testing for small delay defects; mixed-signal BIST and DFT; ATE software standards; fault modeling and tolerance; advances in diagnosis; test economics; ATPG/fault simulation; interconnect testing and fault diagnosis in FPGAs; RF testing; state space exploration and test generation; SOC test case studies; testing of digital, analog and MEMS chips; test compression; mixed-signal test techniques; embedded memories BIST and repair; delay testing; picosecond jitter testing; wafer probe technology; test wrapper design; design-for-availability; SOC testing; ADC testing; open architecture ATE; security vs. test quality; analog testability; DPM in nanometer technology; failure analysis; investment vs. yield relationship for memories in SOC.
Keywords :
automatic test equipment; automatic test pattern generation; boundary scan testing; built-in self test; delays; design for testability; failure analysis; fault diagnosis; fault simulation; fault tolerance; field programmable gate arrays; integrated circuit testing; integrated memory circuits; jitter; logic testing; microprocessor chips; mixed analogue-digital integrated circuits; printed circuit testing; system-on-chip; ADC testing; ATE software standards; ATPG; BIST; DFT; FPGA; IC diagnosis; MEMS chips; RF testing; SOC testing; analog testability; board testing; delay testing; design-for-availability; embedded memories testing; failure analysis; failure characterization methods; fault diagnosis; fault modeling; fault simulation; fault tolerance; interconnect testing; logic testing; memory testing; microprocessor testing; mixed-signal BIST; mixed-signal test techniques; nanometer technology; open architecture ATE; picosecond jitter testing; system testing; test compression; test economics; test wrapper design; wafer probe technology;
Conference_Titel :
Test Conference, 2004. Proceedings. ITC 2004. International
Conference_Location :
Charlotte, NC, USA
Print_ISBN :
0-7803-8580-2
DOI :
10.1109/TEST.2004.1386912
