DocumentCode
2437652
Title
An evolvable hardware FPGA for adaptive hardware
Author
Haddow, Pauline C. ; Tufte, Gunnar
Author_Institution
Dept. of Comput. & Inf. Sci., Norwegian Univ. of Sci. & Technol., Trondheim, Norway
Volume
1
fYear
2000
fDate
2000
Firstpage
553
Abstract
Can we realise the opportunities that lie in design by evolution by using traditional technologies or are there better technologies which will allow us to fully realise the potential inherent in evolvable hardware? The authors consider the characteristics of evolvable hardware, especially for adaptive design, and discuss the demands that these characteristics place on the underlying technology. They suggest a potential alternative to today´s FPGA technology. The proposed architecture is particularly focused at reducing the genotype required for a given design by reducing the configuration data required for unused routing resources and allowing partial configuration down to a single CLB. In addition, to support adaptive hardware, self-reconfiguration is enabled
Keywords
computer architecture; evolutionary computation; field programmable gate arrays; logic CAD; CLB; FPGA technology; adaptive design; adaptive hardware; configuration data; design by evolution; evolvable hardware FPGA; genotype; partial configuration; self-reconfiguration; underlying technology; unused routing resources; Cloning; Electronics industry; Field programmable gate arrays; Genetic mutations; Hardware; Information science; Process design; Productivity; Routing; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Evolutionary Computation, 2000. Proceedings of the 2000 Congress on
Conference_Location
La Jolla, CA
Print_ISBN
0-7803-6375-2
Type
conf
DOI
10.1109/CEC.2000.870345
Filename
870345
Link To Document