Title :
Phase frequency detectors for fast frequency acquisition in zero-dead-zone CPPLLs for mobile communication systems
Author :
Lee, Kun-Seok ; Park, Byeong-Ha ; Lee, Han-il ; Yoh, Min Jong
Author_Institution :
Syst.-LSI Div., Samsung Electron., Kyounggi-do, South Korea
Abstract :
This paper introduces a new-type phase-frequency-detector (PFD) for charge pump phase-locked-loops (CPPLLs). As the PFD is configured to separate the reset part and the delay part independently, the input signal edge data, which arrive during an added delay to remove dead-zone, are not lost and do not output the wrong information, resulting in faster locking property. The experimental results of the proposed PFD show the reduced frequency acquisition time by about 30% compared with the conventional PFD in the case of 70MHz voltage-controlled-oscillator (VCO) frequency hopping for PCS mobile applications. The PFD is designed and simulated by SPECTRE and the prototype, together with a frequency synthesizer, has been fabricated in a 0.5/spl mu/m BiCMOS technology.
Keywords :
CMOS digital integrated circuits; integrated circuit design; mobile communication; phase detectors; phase locked loops; voltage-controlled oscillators; 0.5 micron; 70 MHz; BiCMOS technology; PCS mobile applications; SPECTRE; VCO; charge pump phase-locked-loops; delay part; fast frequency acquisition; frequency hopping; frequency synthesizer; mobile communication systems; phase frequency detectors; reset part; voltage-controlled-oscillator; zero-dead-zone CPPLL; Added delay; Charge pumps; Frequency synthesizers; Mobile communication; Personal communication networks; Phase frequency detector; Phase locked loops; Virtual prototyping; Voltage; Voltage-controlled oscillators;
Conference_Titel :
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location :
Estoril, Portugal
Print_ISBN :
0-7803-7995-0
DOI :
10.1109/ESSCIRC.2003.1257188