Design of test platform for 3D graphics pipeline based on Microblaze

As the importance of 3D graphics increased rapidly in handled device performance, we designed a 3D graphics accelerator to fit the low power consumption. In order to testing the capability of the accelerator, a hardware/software co-processing system for 3D graphics pipeline test platform is proposed in this paper. The system consists of a soft-core microprocessor and a dedicated hardware accelerator for 3D graphics pipeline implemented on an FPGA. Thus, we studied the structure of Microblaze in order to translate the 3D model data to the accelerator. The design is described in Verilog HDL and synthesized on a Xilinx Virtex-5 FPGA. The experimental results from this hardware implementation showed that a cow model with 5800 triangle faces rotated smoothly.