Sub-continuum thermal simulations of deep sub-micron devices under ESD conditions

The decreasing dimensions of IC devices is rendering the heat diffusion equation highly inaccurate for simulations of electrostatic discharge (ESD) phenomena. As dimensions of the heated region in the device are reduced far below 200 nm, neglecting the ballistic, sub-continuum nature of phonon conduction in the silicon lattice can strongly underpredict the temperature rise. This work integrates the phonon Boltzmann transport equation (BTE) in deep sub-micron silicon devices and presents a general methodology for solving the BTE. The approach developed is applicable to both Si and SOI devices and predicts temperature rises consistent with failure voltage measurements for practical devices