Title :
Modeling of direct tunneling current through gate dielectric stacks
Author :
Mudanai, S. ; Fan, Y.-Y. ; Ouyang, Q. ; Tasch, A.F. ; Register, F. ; Kwong, D.L. ; Banerjee, S.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Abstract :
The direct tunneling current has been calculated for the first time from an inverted p-substrate through different gate dielectrics by numerically solving Schrodinger´s equation and allowing for wave function penetration into the gate dielectric stack. The numerical solution adopts a first-order perturbation approach to calculate the lifetime of the quasi-bound states. This approach has been verified to be valid even for extremely thin dielectrics (0.5 nm). The WKB solution agrees well with the tunneling currents predicted by this technique. For the same effective oxide thickness (EOT), the direct tunneling current decreases with increasing dielectric constant, as expected. However, in order to take full advantage of using high-k dielectrics as gate insulators, the interfacial oxide must be eliminated. We also present for the first time the C-V curves obtained assuming that the wave function penetrates into the oxide
Keywords :
Poisson equation; Schrodinger equation; WKB calculations; bound states; capacitance; dielectric thin films; numerical analysis; permittivity; perturbation theory; semiconductor-insulator boundaries; tunnelling; wave functions; 0.5 nm; C-V curves; Schrodinger´s equation; WKB solution; dielectric constant; direct tunneling current; direct tunneling current modeling; effective oxide thickness; extremely thin dielectrics; first-order perturbation approach; gate dielectric stacks; gate dielectrics; gate insulators; high-k dielectrics; interfacial oxide elimination; inverted p-substrate; numerical solution; quasi-bound state lifetime; tunneling currents; wave function penetration; Dielectric constant; Dielectric substrates; Differential equations; Electrodes; High K dielectric materials; High-K gate dielectrics; Microelectronics; Quantization; Silicon; Tunneling;
Conference_Titel :
Simulation of Semiconductor Processes and Devices, 2000. SISPAD 2000. 2000 International Conference on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-6279-9
DOI :
10.1109/SISPAD.2000.871242