• DocumentCode
    245371
  • Title

    An evaluation of an energy efficient many-core SoC with parallelized face detection

  • Author

    Usui, Hideyuki ; Tanabe, Jun ; Sano, Tomomi ; Hui Xu ; Miyamori, Takashi

  • Author_Institution
    Toshiba Semicond. & Storage Products Co., Toshiba Corp., Kawasaki, Japan
  • fYear
    2014
  • fDate
    20-23 Jan. 2014
  • Firstpage
    311
  • Lastpage
    316
  • Abstract
    New applications such as image recognition and augmented reality (AR) have become into practical on embedded systems. For these applications, we have developed a many-core SoC that includes two many-core clusters with 32 energy efficient processor cores connected by a low latency tree-based NoC. In this paper, we evaluate performance of many-core SoC by face detection as an example of real image recognition applications and discuss two parallelized implementations on the many-core clusters. By keeping balance of workloads on the cores, the performance scales up to 64 cores and the SoC consumes only 2.21W. The energy efficiency is several tens of times better than that of a high performance desk-top quad-core processor.
  • Keywords
    augmented reality; face recognition; system-on-chip; augmented reality; embedded systems; energy-efficient many-core SoC; energy-efficient processor cores; high-performance desk-top quad-core processor; image recognition; low-latency tree-based NoC; many-core clusters; parallelized face detection; parallelized implementation; power 2.21 W; Bandwidth; Energy efficiency; Face; Face detection; Image recognition; Parallel processing; System-on-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific
  • Conference_Location
    Singapore
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2014.6742908
  • Filename
    6742908