Single-Metal Dual-Dielectric (SMDD) gate-first CMOS integration towards low VT and high performance

Author

Ragnarsson, L-Å ; Schram, T. ; Röhr, E. ; Sebaai, F. ; Kelkar, P. ; Wada, M. ; Kauerauf, T. ; Aoulaiche, M. ; Cho, M.J. ; Kubicek, S. ; Lauwers, A. ; Hoffmann, T.Y. ; Absil, P.P. ; Biesemans, S.

Author_Institution

IMEC, Leuven, Belgium

fYear

2009

fDate

27-29 April 2009

Firstpage

49

Lastpage

50

Abstract

This paper overviews integration challenges of low-V_T gate-first CMOS featuring one metal gate electrode and one host dielectric with Al₂O₃ and La₂O₃ cap-dielectrics for pMOS and nMOS respectively. The advantages and disadvantages of employed low EOT low V_T enabling technologies are compared with respect to processing simplicity as well as device performance and reliability. The latest state-of-the art SMDD device results are reported.

Keywords

CMOS integrated circuits; dielectric materials; semiconductor device reliability; Al₂O₃; La₂O₃; gate-first CMOS integration; host dielectric; metal gate electrode; nMOS; pMOS; single-metal dual-dielectric; Aluminum oxide; Art; CMOS technology; Dielectric devices; Electrodes; Etching; Hafnium oxide; MOS devices; Manufacturing; Resists;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems, and Applications, 2009. VLSI-TSA '09. International Symposium on

Conference_Location

Hsinchu

ISSN

1524-766X

Print_ISBN

978-1-4244-2784-0

Electronic_ISBN

1524-766X

Type

conf

DOI

10.1109/VTSA.2009.5159287

Filename

5159287