DocumentCode
2458331
Title
Parallel processing algorithm for Bayesian network inference
Author
Kaspi, Gil ; Ratsaby, Joel
Author_Institution
Dept. of Electr. & Electron. Eng., Ariel Univ. Center of Samaria, Ariel, Israel
fYear
2012
fDate
14-17 Nov. 2012
Firstpage
1
Lastpage
5
Abstract
We introduce an algorithm for Bayesian network inference using parallel computations that perform variable-elimination over multiple threads of execution. The algorithm can be implemented on a collection of parallel execution entities on a single FPGA. Each execution entity performs addition and multiplication. Relative to the standard bucket elimination, the parallel algorithm reduces the computational time by an amount that depends on the coupling (probabilistic dependency) of the network and on the evidence available at time of prediction query.
Keywords
belief networks; inference mechanisms; multi-threading; parallel algorithms; probability; query processing; Bayesian network inference; multiple threads; parallel execution entity; parallel processing algorithm; prediction query; probabilistic dependency; single FPGA; standard bucket elimination; Bayesian methods; Field programmable gate arrays; Indexes; Instruction sets; Parallel algorithms; Probabilistic logic; Standards;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical & Electronics Engineers in Israel (IEEEI), 2012 IEEE 27th Convention of
Conference_Location
Eilat
Print_ISBN
978-1-4673-4682-5
Type
conf
DOI
10.1109/EEEI.2012.6377114
Filename
6377114
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