DocumentCode :
2460437
Title :
A Serial-In Parallel-Out Multiplier Using Redundant Representation For A Class of Finite Fields
Author :
Namin, Ashkan Hosseinzadeh ; Wu, Huapeng ; Ahmadi, Majid
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Windsor, Windsor, ON
fYear :
2006
fDate :
Oct. 29 2006-Nov. 1 2006
Firstpage :
1702
Lastpage :
1705
Abstract :
A new serial-in parallel-out finite field multiplier using redundant basis for a class of fields is proposed. It has been shown that the proposed architecture has higher speed in comparison to the previously proposed architecture using the same basis. Hardware realizations of the proposed multiplier and previously proposed multiplier along with their comparison is also presented.
Keywords :
multiplying circuits; redundancy; hardware realizations; redundant representation; serial-in parallel-out multiplier; Arithmetic; Clocks; Computer architecture; Elliptic curves; Galois fields; Hardware; Polynomials; Proposals; Public key cryptography; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 2006. ACSSC '06. Fortieth Asilomar Conference on
Conference_Location :
Pacific Grove, CA
ISSN :
1058-6393
Print_ISBN :
1-4244-0784-2
Electronic_ISBN :
1058-6393
Type :
conf
DOI :
10.1109/ACSSC.2006.355051
Filename :
4176861
Link To Document :
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