Negative bias temperature instabilities in pMOSFETS: Ultrafast characterization and modelling

In this work an ultrafast characterization technique has been developed with the aim of studying the NBTI degradation in pMOS transistors by acquiring the threshold voltage (V_th) shift in very short relaxation times after the electrical stress removal. The NBTI degradation has been studied as a function of the stress and relaxation time. The observed BTI relaxation has been explained in the framework of the BTI emission and capture provability maps of the defects, using the Probabilistic Defect Occupancy Model. This model has been introduced in a simulation tool to transfer the effects of NBTI degradation at device level up to the circuit level, in order to evaluate how the device properties affect the circuit performance and reliability.