Complex IF Harmonic Rejection Mixer for Non-Contiguous Dual Carrier Reception in 65 nm CMOS

This paper presents a complex IF mixer for a double conversion receiver architecture to be used for non-contiguous dual carrier reception as specified in upcoming releases of 3GPP standards. The complex IF mixer contains four harmonic rejection (HR) mixers, each of which is implemented with 64 passive unit cell mixers, clocked by a ring-oscillator based phase-locked loop and driven by sequencers that represent thermometer-coded oversampled sinusoidal LO waveforms. Each HR mixer is followed by a buffer and a signal distribution network to enable separation of the two carriers as well as IQ-imbalance correction. The complex IF mixer supports reception of two carriers with up to 65 MHz separation using 12 samples per IF LO period and a clock frequency of 390 MHz. The IF mixer is implemented in 65 nm CMOS, has an area of 0.74 mm², draws 26 mA, and has a harmonic conversion lower than -68 dBc per harmonic.