Title :
Next generation 600V CSTBT™ with an advanced fine pattern and a thin wafer process technologies
Author :
Honda, Shigeto ; Haraguchi, Yuki ; Narazaki, Atsushi ; Terashima, Tomohide ; Terasaki, Yoshiaki
Author_Institution :
Power Semicond. Device Dev. Dept., Mitsubishi Electr. Corp., Kumamoto, Japan
Abstract :
In this paper, we present the characteristics of a fabricated 600V CSTBT™ as the next generation IGBT. The techniques applied this novel device include about half-size shrinkage of the transistor unit cell with a fine pattern process and an LPT (Light Punch Through) structure utilizing an advanced thin wafer process technology. As a result, these techniques brought a significant reduction of the Vce(sat) and the Eoff. The Vce(sat)-Eoff trade-off relationship of the proposed CSTBT has been improved by approximately 20% compared to the conventional one possessing wide SOA (Safe Operating Area) enough to device applications.
Keywords :
insulated gate bipolar transistors; semiconductor device models; CSTBT; IGBT; LPT; advanced thin wafer process technology; fine pattern process; half-size shrinkage; light punch through structure; safe operating area; thin wafer process technologies; transistor unit cell; voltage 600 V; Electric variables; Insulated gate bipolar transistors; Next generation networking; Power semiconductor devices; Semiconductor optical amplifiers; Substrates; Transistors; 600V LPT-CSTBT; Vce(sat)-Eoff trade-off relationship; fine pattern process; thin wafer process;
Conference_Titel :
Power Semiconductor Devices and ICs (ISPSD), 2012 24th International Symposium on
Conference_Location :
Bruges
Print_ISBN :
978-1-4577-1594-5
Electronic_ISBN :
1943-653X
DOI :
10.1109/ISPSD.2012.6229045
