On the development of Software-Based Self-Test methods for VLIW processors

Software-Based Self-Test (SBST) approaches are an effective solution for detecting permanent faults; this technique has been widely used with a good success on generic processors and processors-based architectures; however, when VLIW processors are addressed, traditional SBST techniques and algorithms must be adapted to each particular VLIW architecture. In this paper, we present a method that formalizes the development flow to write effective SBST programs for VLIW processors, starting from known algorithms addressing traditional processors. In particular, the method addresses the parallel Functional Units, such as ALUs and MULs, embedded into a VLIW processor. Fault simulation campaigns confirm the validity of the proposed method.