DocumentCode
2479167
Title
P3I-3 Wafer Level Chip Size Packaging of SAW Devices Using Low Temperature Sacrifice Process
Author
Koh, Keishin ; Yamazaki, Tanori ; Hohkawa, Kohji
Author_Institution
Kanagawa Inst. of Technol., Atsugi
fYear
2007
fDate
28-31 Oct. 2007
Firstpage
1890
Lastpage
1893
Abstract
In this paper, we report a basic study on wafer level chip size packaging (WL-CSP) process of SAW devices using low temperature sacrifice process. We used the dry film photoresist as sacrifice layer because it has advantage such as low treating temperature (<120 degree), easily coating on the surface of wafer and easily to removal by organic solution. We proposed several processes using dry film photoresist for different purpose. We investigated various processing conditions and successfully fabricated a cavity with small size as active area of the SAW device. The experimental results confirmed feasibility of the dry film photoresist used in WL-CSP technology of SAW device.
Keywords
chip scale packaging; photoresists; surface acoustic wave devices; wafer level packaging; SAW devices; WL-CSP; dry film photoresist; low temperature sacrifice process; wafer level chip size packaging; Costs; Electronics packaging; Etching; Fabrication; Resists; Semiconductor device packaging; Surface acoustic wave devices; Temperature; Wafer bonding; Wafer scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Ultrasonics Symposium, 2007. IEEE
Conference_Location
New York, NY
ISSN
1051-0117
Print_ISBN
978-1-4244-1384-3
Electronic_ISBN
1051-0117
Type
conf
DOI
10.1109/ULTSYM.2007.475
Filename
4410048
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