A Novel Energy Efficient Source Routing for Mesh NoCs

Network on Chip (NoC) is the upcoming interconnection framework for multi-core processors. In chip-multicore processors, the performance of the underlying communication network is determined by the efficiency of the routing logic used in NoC routers. Distributed routing and source routing are the two main classification of routing techniques. For routers employing static routing policies, distributed routing leads to redundant computations in each router and increases complexity of routers. We analyse the existing state-of-art source routing technique and propose a novel alternative that makes routing process simpler and faster. Our proposed design reduces the number of bits needed to encode the route in the packet header, reduces the router pipeline latency and hence allows the network to be operated at a frequency approximately two times faster than the existing design.