DocumentCode
2488166
Title
Current testing procedure for deep submicron devices
Author
Chichkov, Anton ; Merlier, Dirk ; Cox, Peter
Author_Institution
Alcatel Microelectron., Oudenaarde, Belgium
fYear
2000
fDate
2000
Firstpage
91
Lastpage
96
Abstract
This paper presents a test technique that employs two different supply voltages for the same IDDQ pattern. The results of the two measurements are subtracted in order to eliminate the inherent subthreshold leakage. Summary of the experiment carried out on a “System on a Chip” (SOC) device build in 0.35 μm technology is also shown. The experiments proved that the method is effective in detecting failures not detectable with the single limit I DDQ
Keywords
automatic testing; electric current measurement; fault diagnosis; integrated circuit testing; leakage currents; IDDQ pattern; SoC device; cumulative probability distribution; current testing procedure; deep submicron devices; different supply voltages; differential current measurement; subthreshold leakage elimination; CMOS technology; Circuit faults; Circuit testing; Current measurement; Failure analysis; Integrated circuit testing; Leakage current; Microelectronics; Stress; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Workshop, 2000. Proceedings. IEEE European
Conference_Location
Cascais
ISSN
1530-1877
Print_ISBN
0-7695-0701-8
Type
conf
DOI
10.1109/ETW.2000.873784
Filename
873784
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