Title :
Minimum delay placement with influence of nets and hierarchical clustering
Author :
Tanaka, Mikiko Sode ; Miyazawa, Yoshiyuki ; Aizawa, Hisamitu ; Minowa, Masayuki
Author_Institution :
Syst. LSI Dev. Div., NEC Corp., Kawasaki, Japan
Abstract :
This paper proposes a minimum delay placement employing a new net weighting method. A new factor to express the influence of a net on critical paths is incorporated in the conventional weight using slack allocation. This influence is defined for each net as the number of critical paths passing through it. An algorithm to calculate the influence is presented whose time complexity is O(n+b), where n is the number of nets and b is the number of blocks respectively. This net weighting method has been applied to the min-cut placement based on hierarchical clustering. The program has decreased the longest path delay by 21% for a benchmark containing 13141 blocks as compared with the case using only slack allocation
Keywords :
circuit layout CAD; computational complexity; delays; integrated circuit layout; IC layout; VLSI; hierarchical clustering; min-cut placement; minimum delay placement; net weighting method; slack allocation; time complexity; Clustering algorithms; Delay effects; Information systems; Integrated circuit interconnections; Large scale integration; National electric code; Optimization methods; Very large scale integration;
Conference_Titel :
Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-1886-2
DOI :
10.1109/CICC.1994.379636