DocumentCode
2490890
Title
An efficient thread architecture for a distributed shared memory on symmetric multiprocessor clusters
Author
Chang, Jyh-Biau ; Tsai, Y.J. ; Shieh, C.K. ; Chung, P.C.
Author_Institution
Dept. of Electr. Eng., Nat. Chung Kung Univ., Tainan, Taiwan
fYear
1998
fDate
14-16 Dec 1998
Firstpage
816
Lastpage
823
Abstract
The purpose of the paper is to demonstrate an efficient thread architecture for a distributed shared memory (DSM) system on symmetric multiprocessor (SMP) clusters. For DSM systems on SMP, how to utilize the processors efficiently without wasting available computational power is a major issue. We discuss three approaches that use the process, the kernel level thread, and the user level thread to map application threads onto execution entities respectively. Considering the advantages and disadvantages of each method, we construct our thread package by combining both the user level thread and the kernel level thread. User level threads correspond to application threads and kernel level threads schedule these user level threads across multiple processors. Threads are light weighted and can be migrated in our thread package. With this thread architecture, our DSM system performs well in elementary experiments
Keywords
distributed shared memory systems; multi-threading; processor scheduling; workstation clusters; DSM system; application threads; computational power; distributed shared memory; execution entities; kernel level thread; multiple processors; symmetric multiprocessor clusters; thread architecture; thread package; user level thread; Application software; Central Processing Unit; Computer architecture; Kernel; Operating systems; Packaging; Parallel processing; Processor scheduling; Workstations; Yarn;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Systems, 1998. Proceedings. 1998 International Conference on
Conference_Location
Tainan
ISSN
1521-9097
Print_ISBN
0-8186-8603-0
Type
conf
DOI
10.1109/ICPADS.1998.741172
Filename
741172
Link To Document