Parallel encodable nonbinary quasi-cyclic LDPC codes with near-capacity performance

In this paper, we propose a class of efficiently encodable nonbinary quasi-cyclic low-density parity-check (QC-LDPC) codes over finite fields. The special structure of the parity-check matrix allows the construction of both regular and irregular codes. A parallel encoding algorithm with a simple shift-register circuits implementation is presented, which significantly reduces the encoding latency. Simulation results show that, the proposed codes, when combined with higher order modulations, perform close to the Shannon limit.