Title :
Performance enhancing factors for manycore architectures: State-of-the-art
Author :
Tamizharasan, P.S. ; Yadav, Praveen Kumar ; Ramasubramanian, N. ; Geetha, K.
Author_Institution :
Dept. of CSE, Nat. Inst. of Technol., Tiruchirappalli, India
Abstract :
Manycore architecture system includes more number of processing elements to improve the performance while sustaining power considerations. Accelerating heterogeneous manycore computing elements involves huge amount of memory copy, computation and thread management. Applications of manycore architectures range from desktop computer to ware-house-scale computer. In this paper, the state-of-the-art trends and techniques of few manycore architectures that address various memory and performance issues are presented. Different parallel programming models that address issues on thread management, accessing virtual shared memory, dynamic load balancing, memory hierarchy and inter-language compatibility are discussed among some of the manycore architectures like NVIDIA´s Graphics Processing Units (GPU), Intel´s Many Integrated Core (MIC) and a joint venture of AMD´s Accelerated Processing Units (APU).
Keywords :
graphics processing units; multiprocessing systems; AMD accelerated processing units; APU; GPU; MIC; NVIDIA graphics processing units; desktop computer; dynamic load balancing; heterogeneous manycore computing elements; interlanguage compatibility; many integrated core; manycore architecture system; manycore architectures; memory copy; memory hierarchy; parallel programming models; performance enhancing factors; processing elements; thread management; virtual shared memory; Bandwidth; Computational modeling; Computer architecture; Graphics processing units; Parallel processing; Parallel programming; Performance evaluation; APU; GPU; MIC; Manycore Architecture; Memory Issue;
Conference_Titel :
Networks & Soft Computing (ICNSC), 2014 First International Conference on
Conference_Location :
Guntur
Print_ISBN :
978-1-4799-3485-0
DOI :
10.1109/CNSC.2014.6906686