A Threshold Voltage Model for Sub-100 nm Pocket Implanted NMOSFET

Author

Bhuyan, Monowar H. ; Ferdous, Fouzia ; Khosru, Quazi Deen Mohd

Author_Institution

Dept. of Electron. & Telecommun. Eng., Daffodil Int. Univ., Dhaka

fYear

2006

fDate

19-21 Dec. 2006

Firstpage

522

Lastpage

525

Abstract

Pocket implantation is a very useful technique to suppress short channel effects in submicrometer MOS devices. This paper presents a threshold voltage model of pocket implanted sub-100 nm nMOSFETs. The proposed model is derived using two linear equations to simulate the pockets along the channel at the surface from the source and drain edges towards the center of the MOSFET. The threshold voltage equation is obtained by solving the 1D Poisson´s equation and then applying Gauss´s law at the surface. The model has a simple compact form that can be utilized to study and characterize the pocket implanted advanced ULSI devices.

Keywords

MIS devices; MOSFET; Poisson equation; semiconductor device models; 1D Poisson equation; Gauss law; pocket implanted nMOSFET; submicrometer MOS devices; threshold voltage model; Doping profiles; Electronic mail; Gaussian processes; MOS devices; MOSFET circuits; Poisson equations; Semiconductor process modeling; Telecommunication computing; Threshold voltage; Ultra large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering, 2006. ICECE '06. International Conference on

Conference_Location

Dhaka

Print_ISBN

98432-3814-1

Type

conf

DOI

10.1109/ICECE.2006.355683

Filename

4178519