DocumentCode
2497559
Title
BPC permutations on the OTIS-Mesh optoelectronic computer
Author
Sahni, Sartaj ; Wang, Chih-Fang
Author_Institution
Dept. of Comput. & Inf. Sci. & Eng., Florida Univ., Gainesville, FL, USA
fYear
1997
fDate
22-24 June 1997
Firstpage
130
Lastpage
135
Abstract
We show that the diameter of an N2 processor OTIS-Mesh is 4√(N-3). Two possible embeddings of an N×N mesh onto an OTIS-Mesh are evaluated. OTIS-Mesh algorithms for some commonly performed permutations-transpose, bit reversal, vector reversal, perfect shuffle, unshuffle, shuffled row-major, and bit shuffle-are developed. We also propose an algorithm for general BPC permutations.
Keywords
optical computing; optical information processing; parallel architectures; BPC permutations; N2 processor OTIS-Mesh; OTIS-Mesh optoelectronic computer; bit shuffle; perfect shuffle; shuffled row-major; unshuffle; vector reversal; Bandwidth; Circuit topology; Computer architecture; Energy consumption; Hypercubes; Information science; Large-scale systems; Optical crosstalk; Optical interconnections; Power system interconnection;
fLanguage
English
Publisher
ieee
Conference_Titel
Massively Parallel Processing Using Optical Interconnections, 1997., Proceedings of the Fourth International Conference on
Print_ISBN
0-8186-7975-1
Type
conf
DOI
10.1109/MPPOI.1997.609157
Filename
609157
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