A Novel Parallel Multiplier for 2´s Complement Numbers Using Booth´s Recoding Algorithm

A novel architecture of parallel multiplier using modified Booth´s recoding unit for 2´s complement numbers is presented in this paper. The basic Booth´s recoding algorithm requires add and shift operations for multiplication, these steps makes this multiplier sequential. Parallel multiplication can be achieved using Booth´s recoding algorithm and simple Brown´s array of adders, but it requires more number of adders to get correct output. Other parallel multiplication techniques are available using Booth´s recoding algorithm. However, these array multiplier also requires add, shift and extra control unit. The proposed design has two major features; first is modified Booth´s recoding unit which produces partial products second is modified array of adders. Modified array of adder block designed, which uses less number of adders than conventional Booth´s recoding multiplier. Multiplexers are basic unit used for Booth´s recoding unit and synthesis has been carried out using 180 nm technology. The proposed design uses less power than conventional Booth´s recoding 2´s complement parallel multiplier.