DocumentCode
2498885
Title
A systolic regular expression pattern matching engine and its application to network intrusion detection
Author
Kawanaka, Yosuke ; Wakabayashi, Shin´ichi ; Nagayama, Shinobu
Author_Institution
Grad. Sch. of Inf. Sci., Hiroshima City Univ., Hiroshima
fYear
2008
fDate
8-10 Dec. 2008
Firstpage
297
Lastpage
300
Abstract
This paper proposes a high-speed string matching circuit for searching a pattern in a given text. In the circuit, a pattern is specified by a class of restricted regular expressions. The architecture of the proposed circuit is a one-dimensional systolic architecture consisting of simple processing units. It can be effectively used for network intrusion detection systems (NIDSs).
Keywords
field programmable gate arrays; security of data; string matching; telecommunication security; FPGA implementation; network intrusion detection; pattern matching engine; string matching circuit; systolic architecture; Application software; Circuits; Computer applications; Computer architecture; Engines; Field programmable gate arrays; Hardware design languages; Intrusion detection; Pattern matching; Telecommunication traffic;
fLanguage
English
Publisher
ieee
Conference_Titel
ICECE Technology, 2008. FPT 2008. International Conference on
Conference_Location
Taipei
Print_ISBN
978-1-4244-3783-2
Electronic_ISBN
978-1-4244-2796-3
Type
conf
DOI
10.1109/FPT.2008.4762402
Filename
4762402
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