DocumentCode
2500550
Title
Task assignment and scheduling under memory constraints
Author
Szymanek, Radoslaw ; Kuchcinski, Krzysztof
Author_Institution
Dept. of Comput. Eng., Lund Univ., Sweden
Volume
1
fYear
2000
fDate
2000
Firstpage
84
Abstract
Many DSP and image processing embedded systems have hard memory constraints which makes it difficult to find a good task assignment and scheduling which fulfill these constraints. The paper presents a new heuristic developed for task assignment and scheduling for such systems. These systems also have a large number of constraints of different nature, such as cost, execution time, memory capacity and limitations on resource usage. The heterogeneous constraints require new synthesis methods which will take them into account while searching for a valid solution. The heuristic presented in the paper is a part of the CLASS system (Constraint Logic Programming based System Synthesis)
Keywords
computational complexity; constraint handling; embedded systems; hardware-software codesign; heuristic programming; scheduling; CLASS system; Constraint Logic Programming based System Synthesis; DSP; execution time; hard memory constraints; heterogeneous constraints; heuristic; image processing embedded systems; memory capacity; memory constraints; resource usage; scheduling; synthesis methods; task assignment; Computer science; Costs; Digital signal processing; Embedded system; Image processing; Job shop scheduling; Logic programming; Memory management; Multiprocessing systems; Processor scheduling;
fLanguage
English
Publisher
ieee
Conference_Titel
Euromicro Conference, 2000. Proceedings of the 26th
Conference_Location
Maastricht
ISSN
1089-6503
Print_ISBN
0-7695-0780-8
Type
conf
DOI
10.1109/EURMIC.2000.874619
Filename
874619
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