• DocumentCode
    25011
  • Title

    Efficient Spatial Processing Element Control via Triggered Instructions

  • Author

    Parashar, Ashwani ; Pellauer, Michael ; Adler, M. ; Ahsan, Bushra ; Crago, Neal ; Lustig, Daniel ; Pavlov, Victor ; Zhai, Antonia ; Gambhir, M. ; Jaleel, Aamer ; Allmon, Randy ; Rayess, Rachid ; Maresh, Stephen ; Emer, Joel

  • Volume
    34
  • Issue
    3
  • fYear
    2014
  • fDate
    May-June 2014
  • Firstpage
    120
  • Lastpage
    137
  • Abstract
    In this article, the authors present triggered instructions, a novel control paradigm for arrays of processing elements (PEs) aimed at exploiting spatial parallelism. Triggered instructions completely eliminate the program counter and allow programs to transition concisely between states without explicit branch instructions. They also allow efficient reactivity to inter-PE communication traffic. The approach provides a unified mechanism to avoid overserialized execution, essentially achieving the effect of techniques such as dynamic instruction reordering and multithreading, which each require distinct hardware mechanisms in a traditional sequential architecture.
  • Keywords
    multi-threading; dynamic instruction reordering; inter-PE communication traffic; multithreading; processing element arrays; sequential architecture; spatial parallelism; spatial processing element control; triggered instructions; Computer architecture; Field programmable gate arrays; Hardware; Instruction sets; Parallel processing; Programming; Radiation detectors; Computer architecture; Field programmable gate arrays; Hardware; Instruction sets; Parallel processing; Programming; Radiation detectors; hardware; high performance computing; networking; processing element; spatial parallelism; triggered instruction;
  • fLanguage
    English
  • Journal_Title
    Micro, IEEE
  • Publisher
    ieee
  • ISSN
    0272-1732
  • Type

    jour

  • DOI
    10.1109/MM.2014.14
  • Filename
    6762794