Title :
TOPLine: a delay-pole-residue method for the simulation of lossy and dispersive interconnects
Author :
Grivet-Talocia, S. ; Canavero, F.G.
Author_Institution :
Dipt. Elettronica, Politecnico di Torino, Italy
Abstract :
This paper presents a modeling technique for lossy frequency-dependent multiconductor transmission lines. The main algorithm involves rational approximations combined with modal delay extraction. The transient results obtained for three benchmark cases are reported and compared to reference solutions.
Keywords :
SPICE; circuit simulation; delays; equivalent circuits; integrated circuit packaging; interconnections; multiconductor transmission lines; poles and zeros; printed circuits; rational functions; transient analysis; transmission line theory; SPICE-ready equivalent circuits; TOPLine lossy/dispersive interconnect simulation; delay-pole-residue simulation methods; frequency-dependent multiconductor transmission lines; modal delay extraction; rational approximations; transient analysis; Circuit simulation; Delay; Dielectric losses; Dispersion; Frequency domain analysis; Integrated circuit interconnections; Multiconductor transmission lines; Power system transients; Transient analysis; Transmission line matrix methods;
Conference_Titel :
Electrical Performance of Electronic Packaging, 2002 IEEE 11th Topical Meeting on
Conference_Location :
Monterey, CA, USA
Print_ISBN :
0-7803-7451-7
DOI :
10.1109/EPEP.2002.1057950
