Title :
High speed and low power consumption DMT integrated circuits based on direct-coupled FET logic circuits
Author :
Fujii, M. ; Hida, H. ; Tsukada, Y. ; Ogawa, Y. ; Kohno, M. ; Shibahara, K. ; Toyoshima, H. ; Shimizu, K. ; Misaki, T.
Author_Institution :
NEC Corp., Kawasaki, Japan
Abstract :
High-speed and low-power-consumption 5-b shift registers based on 0.5- mu m-gate E/D-DMTs (doped-channel hetero-MISFETs) are described. The devices were fabricated using n/sup +/-GaAs selective MOCVD (metalorganic chemical vapor deposition) growth and AlGaAs-GaAs selective dry etching techniques. The developed technologies allow parasitic resistance reduction and short channel effect suppression, resulting in high-performance E/D-DMTs with excellent uniformity. The ICs fabricated using these technologies operate up to 5 Gb/s with very small power consumption of 45 mW (1.1 mW/gate, 20- mu m width for an E-DMT driver).<>
Keywords :
CVD coatings; III-V semiconductors; MOS integrated circuits; aluminium compounds; gallium arsenide; insulated gate field effect transistors; integrated logic circuits; shift registers; sputter etching; 0.5 micron; 45 mW; AlGaAs-GaAs; DMT integrated circuits; E/D-DMTs; bit rate 5 Gbit/s; direct-coupled FET logic circuits; doped-channel hetero-MISFETs; dry etching techniques; parasitic resistance reduction; power consumption; selective MOCVD; shift registers; short channel effect suppression; uniformity; Dry etching; Energy consumption; FET integrated circuits; Gallium arsenide; High speed integrated circuits; Logic circuits; MOCVD; National electric code; OFDM modulation; Voltage;
Conference_Titel :
Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-0817-4
DOI :
10.1109/IEDM.1989.74240
