Title :
Automatic VHDL generation software tool for parameterized FPGA based FFT architectures
Author :
Schmuland, Todd E. ; Longbrake, Matthew B. ; Buxa, Peter E. ; Jamali, Mohsin M.
Author_Institution :
Dept. of EECS, Univ. of Toledo, Toledo, OH, USA
Abstract :
This paper describes the development of a software tool for simulating and generating fully parallel generic VHDL representations of Fast Fourier Transforms. Several fixed-point number optimizations are described with emphasis on maximizing speed and/or minimizing FPGA area. Twiddle factor bit precision and its effects on FPGA area usage are also explored.
Keywords :
fast Fourier transforms; field programmable gate arrays; fixed point arithmetic; hardware description languages; optimisation; parallel processing; software tools; FFT architecture; automatic VHDL generation software tool; fast Fourier transform; fixed point number optimization; parallel generic VHDL representation; Clocks; Computer architecture; Field programmable gate arrays; Generators; Hardware; Leg; Software tools; Discrete Fourier transform; Field programmable gate array; Hardware design language; Software tool;
Conference_Titel :
Aerospace and Electronics Conference (NAECON), Proceedings of the IEEE 2010 National
Conference_Location :
Fairborn, OH
Print_ISBN :
978-1-4244-6576-7
DOI :
10.1109/NAECON.2010.5712968
