DocumentCode
251622
Title
Combinational circuits without false paths
Author
Matrosova, A. ; Kudin, D. ; Nikolaeva, E.
Author_Institution
Dept. of Appl. Math. & Cybern., Tomsk State Univ., Tomsk, Russia
fYear
2014
fDate
26-29 Sept. 2014
Firstpage
1
Lastpage
6
Abstract
It is known that identifying false paths allows improving a circuit performance but finding false paths is associated with large calculations. In this paper we suggest methods of combinational circuit design that guarantee an absence of false paths in the resulting circuits. Some design methods keeping the specification formulae are considered. The sufficient condition of an absence of false paths in a combinational circuit is formulated. It is shown that the certain types of specification formulae together with the proper design methods keeping the formulae provide this condition for resulted circuits. Examples of the circuits without false paths are given.
Keywords
combinational circuits; logic design; combinational circuit design; false paths; Boolean functions; Circuit faults; Combinational circuits; Data structures; Design methodology; Logic gates; Sufficient conditions; Reed-Muller expression; binary decision diagram (BDD); disjoint sum of products (DSoP); false path; irredundant sum of products (irredundant SoP); path delay fault (PDF);
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium (EWDTS), 2014 East-West
Conference_Location
Kiev
Type
conf
DOI
10.1109/EWDTS.2014.7027103
Filename
7027103
Link To Document