Abstract :
The following topics are dealt with: advanced interconnects including power electronic packaging, high density electrical interconnect, wafer to wafer bonding, and substrates and conductive adhesives for interconnects; 3D and through silicon via (TSV) integration technology including wafer handling, lithography, metallization, and Cu/low-k stack die FBGA package; signal and power integrity; electronics interconnects in manufacturing, plating of semiconductor devices, microetch process, substrate patterning, and die attach; materials for advanced packaging including nanostructured materials and polymers; advanced packaging including dicing process, die packaging, plastic packaging, solder bumps and microbumps, PCBs, and flexible substrates; embedded technology ; theoretical analysis of electronic packages; package reliability including surface mount device, BGA interconnects, and optoelectronic devices; mechanical modelling in microelectronics packaging and wire bonding; solder joint reliability; cooling solution including thermal management and thermal performance for packages such as package-on-package system and portable electronics; solder interconnects; flip chip; advanced reliability test methods; solder joint fatigue modeling; MEMS packaging; interfacial reliability; design for wafer level packaging and chip scale packaging (WLCSP) reliability; optical packaging such as LED package; copper wirebonding; electromagnetic environment modeling of UHF-RFID, RF characterization, 3D SiP, band pass filters, and inductors; drop impact reliability; electromigration; lead-free solders; materials and processes; and thermal characterization of interface materials and packages.
Keywords :
UHF integrated circuits; ball grid arrays; band-pass filters; chip scale packaging; conductive adhesives; electromigration; fatigue; flexible electronics; flip-chip devices; impact (mechanical); inductors; integrated circuit design; integrated circuit interconnections; integrated circuit manufacture; integrated circuit metallisation; integrated circuit modelling; integrated circuit reliability; integrated circuit testing; lithography; microassembling; micromechanical devices; nanostructured materials; optoelectronic devices; plastic packaging; polymers; power electronics; printed circuit manufacture; printed circuits; radiofrequency identification; semiconductor device manufacture; soldering; solders; substrates; system-in-package; system-on-package; thermal management (packaging); wafer bonding; wafer level packaging; wafer-scale integration; 3D SiP; 3D integration technology; BGA interconnects; Cu-low-k stack die FBGA package; LED package; MEMS packaging; PCB; RF characterization; TSV; UHF-RFID; WLCSP reliability; advanced interconnects; advanced packaging; band pass filters; chip scale packaging; conductive adhesive; cooling solution; copper wirebonding; dicing process; die attach; die packaging; drop impact reliability; electromagnetic environment modeling; electromigration; electronic package theoretical analysis; electronics packaging technology; embedded technology; flexible substrates; flip chip; high density electrical interconnect; inductors; integrated circuit manufacturing; interconnect substrates; interface materials; interfacial reliability; lead-free solders; lithography; mechanical modelling; metallization; microetch process; nanostructured materials; optical packaging; optoelectronic devices; package reliability; package-on-package system; plastic packaging; polymers; portable electronics; power electronic packaging; power integrity; reliability test method; semiconductor device manufacturing; semiconductor device plating; signal integrity; solder bumps; solder interconnects; solder joint fatigue modeling; solder joint reliability; solder microbumps; substrate patterning; surface mount device; thermal characterization; thermal management; thermal performance; through silicon via integration technology; wafer handling; wafer level packaging design; wafer to wafer bonding; wire bonding;
