DocumentCode :
2518495
Title :
A Study of Lead-Free BGA Backward Compatibility Through Solderability Testing at Component Level
Author :
Leng, Eu Poh ; Ling, Wong Tzu ; Amin, Nowshad ; Ahmad, Ibrahim
Author_Institution :
Freescale Semicond., Petaling Jaya, Malaysia
fYear :
2008
fDate :
9-12 Dec. 2008
Firstpage :
463
Lastpage :
469
Abstract :
A study was conducted to assess the backward compatibility of three different lead-free BGA components using Jedec Solderability testing method (JESD22-B102D). The test was conducted at component level. The three components tested were 29×29 mm Thermally Enhanced PBGA (TePBGA-II) and 35×35mm Tape BGA (TBGA) with SAC387 and Sn3.5Ag solder balls, as well as 33×33 mm Flip Chip HiCTE BGA with only Sn3.5Ag solder balls. Four units from each of the three component types were used to prepare the profiling pallet. These pallets were used to obtain a Low Solderability Profile and a High Solderability Profile to encompass the low and high end of the reflow profile according to Jedec SnPb Solderability Test Conditions. The sample size used in the final solderability testing study was 15 units for each component and solder ball alloy type. Prior to solderability reflow, all the 15 units per cell were subjected to 8 hrs of steamaging and followed by lhr baking at 100 degree C. This is followed by solderability testing which includes SnPb paste printing onto ceramic plates using stencil with the component´s arrays. Next, components were place on the solder paste array using Fine Placer machine. And the components were reflowed in the Low and High SnPb Solderability Profile which were obtained earlier for each of the three component types. Finally, components will be detached from ceramic plate by force. Inspection will be done on the solder balls on the component as well as on the ceramic plate.
Keywords :
ball grid arrays; integrated circuit packaging; silver alloys; soldering; tin alloys; IC packaging; SnAg; backward compatibility; ceramic plates; flip chip HiCTE BGA; paste printing; solderability reflow; solderability testing; tape BGA; temperature 100 degC; thermally enhanced PBGA; time 1 hr; time 8 hr; Assembly; Ceramics; Electronic equipment testing; Electronics industry; Environmentally friendly manufacturing techniques; Industrial electronics; Lead compounds; Semiconductor device testing; Soldering; Surface-mount technology; IC packaging; SMT assembly; backward compatibility; lead-free; solderability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference, 2008. EPTC 2008. 10th
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-2117-6
Electronic_ISBN :
978-1-4244-2118-3
Type :
conf
DOI :
10.1109/EPTC.2008.4763477
Filename :
4763477
Link To Document :
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